EE/CS 120A: Logic Design Winter 2007

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Subject area: EE/CS Course number: 120A Section number: 001
Course title: LOGIC DESIGN Units: 5
Call number: 13100/12302 Instructor(s): Fonoberov V
Class type: LEC Day: MWF Time: 2:10 - 3:00 p.m. Location: BOYHL 1471
Final exam: 03/22/2007 8-11 a.m. Max enrollment: 60
Seats Available: 9
Status: Open
Activity Control: REGISTRATION REQUIRED FOR LEC, LAB
Prerequisite(s): CS 061 with a grade of "C-" or better
UCR General Catalog 2006-2007: EE/CS 120A. Logic Design 5
Lecture, 3 hours; laboratory, 6 hours. Prerequisite(s): CS 061 with a grade of "C-" or better. Covers the design of digital systems. Topics include Boolean algebra; combinational and sequential logic design; design and use of arithmetic-logic units, carry-lookahead adders, multiplexors, decoders, comparators, multipliers, flip-flops, registers, and simple memories; state-machine design; and basic register-transfer level design. Laboratories involve use of hardware description languages, synthesis tools, programmable logic, and significant hardware prototyping.

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Last modified: February 15, 2007; 10:35 PM